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STP80NF55-06 - STP80NF55-06FP STB80NF55-06-1
N-CHANNEL 55V - 0.005 - 80A TO-220/TO-220FP/I2PAK STripFETTM POWER MOSFET
TYPE STP80NF55-06/-1 STP80NF55-06FP
s s s s
VDSS 55 V 55 V
R DS(on) <0.0065 <0.0065
ID 80 A 60 A
3 2 1
s
TYPICAL RDS(on) = 0.005 EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION ADD SUFFIX "T4" FOR ORDERING IN TAPE & REEL
TO-220
1 2 3
TO-220FP
I2PAK (Tabless TO-220) INTERNAL SCHEMATIC DIAGRAM
DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique "Single Feature SizeTM " strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s SOLENOID AND RELAY DRIVERS s MOTOR CONTROL, AUDIO AMPLIFIERS s DC-DC CONVERTERS s AUTOMOTIVE ENVIRONMENT ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID (1) ID IDM (l ) PTOT VISO dv/dt (2) Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuous) at TC = 25C Drain Current (continuous) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Insulation Winthstand Voltage (DC) Peak Diode Recovery voltage slope Storage Temperature Operating Junction Temperature
Value STP(B)80NF-06-1 55 55 20 80 80 320 300 2 -10 - 55 to 175
(1) Current Limited by Package (2) ISD 80A, di/dt 400 A, VDD V(BR)DSS, Tj TJMAX.
Unit V V V 60 42 240 45 0.30 2500 A A A W W/C V V/ns C
STP80NF55-06FP
(q) Pulse width limi ted by safe operating area
April 2002
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THERMAL DATA
TO-220 / I2PAK Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 0.5 62.5 300 TO-220FP 3.33 C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 35 V) Max Value 80 650 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V Min. 55 1 10 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) R DS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10 V, I D = 40 A Min. 2 Typ. 3 0.005 Max. 4 0.0065 Unit V
DYNAMIC
Symbol gfs (1) C iss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS =15 V , ID =40 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 50 7300 980 250 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Q gd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 27V, ID = 40A RG = 4.7 VGS = 10V (see test circuit, Figure 3) VDD = 44V, ID = 80A, VGS = 10V Min. Typ. 40 240 190 38 66 256 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Condit ions VDD = 27V, ID = 40A, R G = 4.7, VGS = 4.5V (see test circuit, Figure 3) Min. Typ. 260 75 Max. Unit ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 80A, VGS = 0 ISD = 80A, di/dt = 100A/s, VDD = 20V, Tj = 150C (see test circuit, Figure 5) 80 0.24 6 Test Conditions Min. Typ. Max. 80 320 1.5 Unit A A V ns C A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
Safe Operating Area for TO-220 / I2PAK
Safe Operating Area for TO-220FP
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Thermal Impedance For TO-220 / I PAK Thermal Impedance For TO-220FP
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
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Gate Charge vs Gate-source Voltage Capacitance Variations
Normalized Gate Threshold Voltage vs Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
Normalized Drain-Source Breakdown vs Temperature
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Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147
E
mm TYP. MAX. 4.60 1.32 2.72 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 MIN. 0.173 0.048 0.094 4.40 1.23 2.40
inch TYP. MAX. 0.181 0.051 0.107 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 0.645 0.551 0.116 0.620 0.260 0.154 0.151
A
C
D1
L2
F1
D
G1
Dia.
F2 F
L5 L7 L6
L9
L4
G
H2
P011C
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TO-220FP MECHANICAL DATA
DIM. MIN. A B D E F F1 F2 G G1 H L2 L3 L4 L6 L7 O 28.6 9.8 15.9 9 3 4.4 2.5 2.5 0.45 0.75 1.15 1.15 4.95 2.4 10 16 30.6 10.6 16.4 9.3 3.2 1.126 0.385 0.626 0.354 0.118 mm TYP. MAX. 4.6 2.7 2.75 0.7 1 1.7 1.7 5.2 2.7 10.4 MIN. 0.173 0.098 0.098 0.017 0.030 0.045 0.045 0.195 0.094 0.393 0.630 1.204 0.417 0.645 0.366 0.126 inch TYP. MAX. 0.181 0.106 0.108 0.027 0.039 0.067 0.067 0.204 0.106 0.409
A
B
L3 L6 L7 F1 F
D
G1
E
H
F2
123 L2 L4
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G
STP80NF55-06/FP/STB80NF55-06-1
TO-262 (I2PAK) MECHANICAL DATA
mm MIN. A A1 B B2 C C2 D e E L L1 L2 4.4 2.49 0.7 1.14 0.45 1.23 8.95 2.4 10 13.1 3.48 1.27 TYP. MAX. 4.6 2.69 0.93 1.7 0.6 1.36 9.35 2.7 10.4 13.6 3.78 1.4 MIN. 0.173 0.098 0.027 0.044 0.017 0.048 0.352 0.094 0.393 0.515 0.137 0.050 inch TYP. MAX. 0.181 0.106 0.036 0.067 0.023 0.053 0.368 0.106 0.409 0.531 0.149 0.055
DIM.
A
C2
B2
B
E
L1 L2 D L
P011P5/E
e
A1
C
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. (c) http://www.st.com
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